MTS Silicon Design Engineer (IP Deployment ) (amd)

amd    Bangalore, Karnataka, India    2024-09-01

Job posting number: #146442 (Ref:amd51699)

Job Description



WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_




  • MTS SILICON DESIGN ENGINEER 

     

    THE ROLE: 

    The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design.  

     

    THE PERSON: 

    You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

    JOB IS FROM: italents.netVIEW 

    Candidate is expected to have strong knowledge on the following synthesis and physical design functions.

    • Hand on experience in perform synthesis and netlisting tasks such as, SDC Development, Scan Insertion, Functional and timing ECO implementation, Formal Verification RTL vs gate, etc.
    • Hands on experience in timing/SDC constraints generation and management. Strong background in Constraint analysis and debug, using industry standard tools
    • Hands-on experience in Chiplevel Design and Integration activities
    • Low power design and implementation knowledge on power aware synthesis & pnr.  Knowledge on voltage domain check will be a plus.
    • Work with Physical Design team on Floor Plan, ram placement, timing closure and resolve congestion etc. 
    • Some exposure to DFT is a strong plus

    Other job requirements:

    1. Hands on experienced in EDA tools like DC and ICC2
    2. Hands on experienced in STA tools and technique for timing closure 
    3. Understanding of floorplan and layout techniques for foundry rule compliant
    4. Experience in scripting with TCL, Perl or Python
    5. Good writing, reading and listening skills in English
    6. Good communication skills with strong interpersonal skills with flexibility
    7. Dedicated, hardworking and good team player

     

    ACADEMIC CREDENTIALS: 

    • Bachelors or Masters degree in computer engineering/Electrical Engineering 
    engineering/Electrical Engineering 

 

#LI-SR4




Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.



Employer Info

Job posting number:#146442 (Ref:amd51699)
Application Deadline:2024-10-01
Employer Location:amd
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