Chipsets Power Simulation and Analysis Engineer (intel)

Job Description

The role is in the Client Chipsets team that is part of the core Intel business. You will be part of a dynamic team that plays a central role in estimating, calibrating, and validating power consumed by various client chipset components from architecture definition to post-silicon. Your work will impact platform, die, SOC, and IP power design and development.

As a Chipsets Power Simulation and Analysis Engineer your responsibilities will include but not limited to:

Designs, develops, and executes power plans for IPs and SoCs.
Identifies, builds, and maintains power optimizations, and characterizations for IP and SoC power goals.

Conducts feature analysis from power standpoint and drives to close any gaps between observed behavior and target on platforms in development.
Provides recommendations for future architectures. Develops methodologies and models to drive continuous improvements in optimization of power configurations to meet market requirements.
Ensures platform and its components are optimized for power. Identifies power activity zones and works with design, architecture, binning/technology, and manufacturing teams on ways to meet power consumption goals.
Works cross functionally on analysis, validation, and tuning of architectures and features that advance the state of art in power.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates

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Minimum Qualifications:

• Bachelor's in electrical or computer engineering with 5+ years of relevant industry experience (or) master's in electrical or computer engineering with 4+ years of relevant industry experience in the following

• Develop best-in-class validation test plans for industry standard protocols

• Understand existing test plans and propose modifications

• Develop, and deploy OVM, UVM System Verilog tests

• Experience in simulating tests on industry standard simulators such as VCS, Xcelium, and Questasim and use waveform tools to debug and root cause, and

•  2+ years of experience in developing test plans and/or validating industry standard protocols PCIE and USB

Preferred Qualifications:

• Understanding of power architecture and concepts involved in Pre-Silicon power modeling-

• Development of power specific test plan, and tests

• Understanding of emulation tools, and model builds

• Scripting in bash and coding in TCL, python

Inside this Business Group

Corporate Strategy Office is chartered to support the executive office in driving corporate initiatives, including near and long-term strategy, major cross-group decision making and ensuring cross-company alignment.  To deliver to that mission, the team owns shaping, driving and synthesizing insights to directionally orient trends as well as long range strategic planning/visioning , cross company alignment and greenfield innovation.  Communications are essential to drive alignment so there is a focus on communications, community and acumen development.  The team is ccommitted to ensuring that Intel efforts are aligned to, and actively driving success toward the most impactful business strategies.

Other Locations

US, San Jose

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.
Annual Salary Range for jobs which could be performed in US, California: $123,419.00-$185,123.00
*Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.