Senior CPU Design Verification Engineer (mediatek)
mediatek HsinChu, Taiwan(China)
2024-09-11
Job posting number: #150166 (Ref:MTK120231229001)
Job Description
Description
1. Study CPU uArch and cook solid Verification Plan.2. Base on DV Plan define and develop UVM, Constraint-Random, C-Based or Formal Verification Environment.
3. Coaching Junior DV Member to effectively achieve DV Milestone.
4. DV Methodology/Tool Evaluation and Deployment to enhance DV quality and efficiency.
5. DV Task Planning and Coordinating Junior Members.
View Orignal JOB on: italents.net
Requirements
1. 5+ Years CPU design verification experience or 6+ Years ARM/RISC-V based SoC/Subsys Verification Experience.2. OOP and UVM/Constraint Random Methodology Knowledge is required
3. Familiar with CPU or AMBA SoC Arch. (AMBA Protocol, Interconnect, Cache, MMU, TrustZone etc...)