Digital Design integration (SOC BE) (mediatek)
mediatek Taipei, Taiwan(China)
2024-09-11
Job posting number: #150271 (Ref:MTK120240619002)
Job Description
Description
SOC Top design integration:1. RTL Purification & synthesis
2. STA Timing analysis
3. Low Power optimization & CLP
4. Netlist level design quality analysis
View Orignal JOB on: italents.net
Requirements
1. Master of engineering degree2. 5+ year of advanced SOC design integration experience:
(1) RTL synthesis (physical aware synthesis)
(2) Design Constraint generation & STA timing analysis
(3) Low Power optimization
(4) Netlist QC