Graphics Formal Verification Engineer (amd)

Job Description

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_

The ideal candidate is a person with extenstive experience in applying formal verification methods to complex IPs for cpu, gpu and high speed protocols.

KEY RESPONSIBLITIES:

• Complete ownership and execution of formal verification of cache controllers, computational IPs, floating point units, etc. 

PREFERRED EXPERIENCE:

• Vast and deep experience of formal verification methods 
• Domain knowledge in cpu, gpu, serial protocols
• Must be able to do compexity reduction, bug hunting or similar methods  

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in computer engineering/Electrical Engineering  #LI-NS1  

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.