Formal Verification (DV) - SMTS/PMTS Silicon Design Engineer (amd)

Job Description

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

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SMTS/PMTS SILICON DESIGN ENGINEER

The AMD Cores design & verification group develops high-end, next generation CPU’s that power different AMD SoC’s which are eventually set to change the course of how computing is visualized. The engineering teams are distributed across US and India. The CPU verification team in India is one of AMD India’s first teams & involved in contributing to the tape out of numerous AMD systems. As part of the CPU Formal Verification team, we will be responsible for delivering high quality signoff on intensive control logic along with complex Datapath verification across CPU through Formal methodology. As always, the team is dedicated to come up with innovative solution to overcome new challenges related to specific project requirements and time-to-market.

KEY RESPONSIBILITIES

· Work with different stake holders in getting a thorough understanding of high-level feature/s & get clarification (if any). Evaluate cross-feature/cross-unit dependencies to evaluate targets for Formal.

· Populate high level testplan that details out how we plan (checks, abstraction, debug, coverage) and get it reviewed & incorporate feedback.

· Create Assertions/Assumptions with necessary level of abstraction to verify complete feature (control logic & datapath both), run formal coverage analysis, x-prop plugins, LEC etc.

· Debug failures to root cause issues/fix constraints and ensure feature health is stable, deal with tool issues with concerned AE from Synopsis/Cadence.

· Handle high sequential depth modules with greater complexity, tool convergence issues.

· On a need basis, work on Post-Si bug recreation.

SKILLS AND EXPERIENCE REQUIREMENTS

• B.E/B.Tech/M.E/M.Tech in Computer Science/Electrical/Electronic Engineering.

• 10+ years of experience in CPU verification/Formal verification on CPU or other complex IP’s.

• Proficiency in Overall Formal Verification methodology with tools like (VSI-FV/JASPER/IFV/IEV).

• Proficiency in creating testplans, building formal testbenches from scratch.

• Good understanding about computer architecture/microarchitecture.

• Good understanding of Verilog, System Verilog, SVA. Some knowledge of shell/perl/python scripting is a plus.

• Should be a good team player, quick thinker, pro-active, adaptable & outspoken/approachable.

• Must communicate well both written and orally.

• Must be well-organized and should be able to multitask well with due diligence on closing his/her tasks.

WHAT YOU WILL LEARN

You will gain valuable experience in different aspects of CPU design & Formal verification. You will also be familiarized with the nuances & challenges associated in formally verifying high-performance, pipelined CPU architecture. This helps you gain valuable insight & enhance your understanding of CPU micro-architecture. This team is essential to the success of AMD as a growing company. It is a very exciting environment, and you will be working with the very best in our technology. You will be working on some of the most exciting projects the industry has to offer

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in computer engineering/Electrical Engineering 

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Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.