EMU/VAL MTS Silicon Design Engineer AECG ASIC (amd)

Job Description

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. JOB IS FROM: italents.netVIEW

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MTS SILICON DESIGN ENGINEER  - Pre and post Si validation engineer

Technical Expertise

   - Solid understanding of computer architecture and digital systems RTL code for IP, sub-systems, and SoCs.

   - Proficiency in hardware description languages (HDLs) such as Verilog or system Verilog

    -Experience in building emulation model builds from scratch for SoC components

   - Familiarity with emulation platforms and tools (e.g., Cadence Palladium, Mentor Graphics, Synopsys ZeBu). including model compilation, test execution, and debugging

   - Knowledge of FPGA (Field-Programmable Gate Array) technology, including synthesis, implementation, and debugging.

   - Experience in setting up and configuring emulation environments.

   - Ability to manage emulation servers, clusters, and resources effectively.

   - Knowledge of software tools used in conjunction with emulation (debuggers, performance analyzers, test automation frameworks).

   - Ability to develop and execute verification plans specific to emulation environments

   - Protocol knowledge of peripherals: Proficient in Arm CPU cores and PCIe Gen4/5, JTAG, SPI, UART, I2C, USB2.0, USB3.0, Display Port, HDMI, Ethernet 1G/2,5G/5G/10G

   - Experience in XTOR Integration and a hands on experience on Speedbridges and Vrtual Bridges is a plus.

Scripting and Automation

   - Proficiency in scripting languages Unix,  Python, Perl, Tcl for automation of emulation tasks, test case generation, and results analysis.

   - Experience in developing automated flows for regression testing and continuous integration (CI) pipelines.

- 8+ years of experience in Pre & post silicon IP or SOC Validation

- Working knowledge of various IO SS – PCIE, ethernet , I2C/I3C, UART, GPIO, SPI

- Hand on experience with one or more types of emulators (Palladium, Protium, Zebu )

- Hands-on experience and well versed in one or more of the scripting languages like C, tcl and Python.

- Extensive experience with debug techniques and methodologies.

- Ability to develop and execute test cases in both pre and post Si environments

- Extensive experience with engineering lab equipment, oscilloscopes, protocol analyzers, signal generators, etc. 

- In-depth knowledge of PC architectures and system technologies.

- Must have excellent written and verbal communication skills for both internal and customer facing interaction.

- Attention to detail and the ability to analyze data quickly is a must.

- Must be a self-starter, able to drive tasks to completion independently in a dynamic team working environment.

- Ability to flex responsibilities over the development lifecycle.

- Knowledge on the system drivers, firmware and software is a plus.

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Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.